Our research focuses on Hardware Accelerators, Heterogeneous Systems, Parallel Computing, Computer Architecture, GPU Computing, Compiler Optimizations, Embedded Systems, and System-on-Chip Architectures. Significant increases in data sizes in real-world applications have motivated the development of scalable data-intensive applications and systems for several years. This requires a design perspective at the system level with both hardware and software support.

The increasing complexity of applications and their large dataset sizes make it imperative to consider novel architectures that are efficient from both performance and power angles. Accelerators are widely used in different domains. As part of this research, we are exploring the possibility of implementing domain-specific accelerators, custom processors, and software support. We specifically accelerate data-intensive applications in different domains, including deep learning applications, graph parallel algorithms, bioinformatics applications, vision transformers, neural architecture search, and convolutional neural networks.

In addition to hardware-level design issues, our research covers software-level support and optimizations. Specifically, we focus on accelerating data-intensive algorithms on CUDA, utilizing accelerator technologies in the Cloud, and improving application behavior on GPU systems through efficient kernel mapping. Furthermore, compiler support needed for custom hardware design is critical to achieving efficiency and productivity.